1. Technical Field
The disclosure relates to a fully depleted silicon-on-insulator (FD SOI) metal oxide semiconductor field effect transistor (MOSFET) and the structure thereof. More particularly, the disclosure relates to fabrication of a FD SOI MOSFET incorporating carrier recombination elements.
2. Related Art
In the current state of the art, the demand for interface standards in high voltage devices/transistors has reached as high as 5V. Partially depleted (PD) silicon-on-insulator (SOI) currently used in the fabrication of metal oxide semiconductor field effect transistor (MOSFET) is not able to attain interfaces of this voltage range. The limiting factor lies with the floating body in the PD SOI, which with high voltage behaves like a bipolar transistor. When a bipolar transistor turns on, parasitic bipolar currents lead to breakdown at a high voltage, particularly in an n-type FET (NFET). To overcome this limitation, a source-body tie in the PD-SOI FET is used to increase the breakdown voltage. However, the increment of the breakdown voltage is by only a few tenths of a volt, which is too low to meet the demand for high performance interfaces and stacking of FETs.
In view of the foregoing, it is desirable to develop an alternative method for fabricating a high voltage SOI FET.